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Complex Digital Systems >> Content Detail



Labs



Labs

See the calendar for due dates and the syllabus for class policies on turning in labs and collaboration. The SMIPS Processor Specification contains details on the SMIPS ISA which is used in several of the labs.


Lab #Topics
1RTL Model of a Two-Stage MIPS Processor (PDF)
2ASIC Implementation of a Two-Stage MIPS Processor (PDF)
3Bluespec Model of a Network Linecard (PDF)

 








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