| L1 | Introduction (PDF)
  Course Objectives, Digital Logic, Hardware Description Languages |  | L2 | Combinational Logic (PDF)
  Logic Gates, Boolean Algebra, Visualizations of Boolean Algebra, Hazards |  | L3 | Introduction to Verilog® (Combinational Logic) (PDF)
  Logic Synthesis, The Verilog® Hardware Description Language, Combinational Logic in Verilog®, Testbenches |  | L4 | Sequential Building Blocks (PDF)
  Preserving State with Feedback, Latches and Flip-flops, Clocks and Timing Constraints, Clock Skew |  | L5 | Simple Sequential Circuits and Verilog® (PDF)
  Simple Counters, Verilog® Implementation of Sequential Circuits |  | L6 | Finite-State Machines and Verilog® Implementation (PDF)
  Metastability and Synchronization, Mealy and Moore Formalisms, Verilog® Implementations, FSM Examples |  | L7 | Memories (PDF)
  Technologies, Types of RAM and ROM, Memory Controller Circuits, Specialty Memories, High-performance Interfaces |  | L8 | Circuits for Arithmetic (PDF)
  Binary Addition and Subtraction, Implementation and Performance of the Full Adder, High-speed Addition, Signed Arithmetic |  | L9 | Analog Building Blocks (PDF)
  Analog Inputs, Useful Op-amp Circuits, A/D and D/A Conversion, Useful A/D and D/A Circuits |  | L10 | System Integration Issues and Major/Minor FSM (PDF)
  Hierarchy and Modularity, Data and Control Paths, Major and Minor FSMs, Memory Modules (RAM/ROM) in Altera, Design Tips |  | L11 | Reconfigurable Logic (PDF - 1.9 MB)  Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools  |  | L12 | Reconfigurable Logic (cont.) (PDF - 1.9 MB)  Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools  |  | L13 | Video (PDF)  Displays, Synchronization, Recovery of Signals, Sync Timing  |  | L14 | Project Kickoff (PDF)
  Video of Past 6.111 Projects, Project Ideas, Deadlines and Goals, Project Guidelines, Grading, Asynchronous Interfaces and Kit-to-kit Communication |  | L15 | Digital Integrated Circuits and Systems (PDF - 2.4 MB)
  Moore's Law, VLSI Integration, Layout and Fabrication, Application-specific Circuits, Microprocessors. Behavioral and Algorithmic Transformations, Retiming, Parallelism and Pipelinling |  | L16 | Power Dissipation (PDF - 1.4 MB)
  Heat and Battery Life Issues, Sources of Power Dissipation, Circuit and Algorithm Optimizations for Power, Voltage Scaling |  | L17 | Motor and Position Determination (PDF)  Servos, Position Measurement, Encoders, Motors, Windings  |  
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